Skip to content
View 14sea's full-sized avatar
🤪
🤪

Block or report 14sea

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. zynq-ehw zynq-ehw Public

    Evolvable Hardware on the EBAZ4205 (Zynq-7010): board-resident GA evolves NN weights + logic circuits on FPGA fabric; ICAP bakes the evolved champion into LUT logic. Builds on zynq-xpart primitives.

    C 1

  2. see_neorv32_run_linux see_neorv32_run_linux Public

    Booting nommu Linux (kernel 6.6.83) on a NEORV32 RV32IMC soft-core FPGA

    C++ 10

  3. zynq-xpart zynq-xpart Public

    Live Xilinx Partial-Reconfiguration (XPART) demo on EBAZ4205 / Zynq-7010 (XC7Z010): DFX module hot-swap + prjxray/ICAP live LUT-INIT surgery, PS-hosted with a NEORV32 soft-core RoT. Continuation of…

    C 2

  4. zynq-agentctl zynq-agentctl Public

    Agent (Claude) controlling live FPGA fabric state on EBAZ4205 (Zynq-7010): runtime LUT-INIT edit via Linux /dev/mem HWICAP ICAP, no reset, as a perceive-decide-act-verify loop

    Python

  5. Cyclone_CRAM_Mapper Cyclone_CRAM_Mapper Public

    A physical-aware routing codec for Intel Cyclone IV FPGAs.

    Python 5

  6. neorv32_tpu neorv32_tpu Public

    NEORV32 RV32IMAC soft-core running nommu Linux with a 4×4 INT8 systolic array NPU on the Heijin AX301 board (Altera Cyclone IV EP4CE6).

    C 4